to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation ( http://www.renesas.com ) send any inquiries to http://www.renesas.com/inquiry .
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rej03d0923-0100 rev.1.00 oct 06, 2009 page 1 of 7 r2a20115sp power factor correction controller ic rej03d0923-0100 rev.1.00 oct 06, 2009 description r2a20115 is a power-factor correction (pfc) controller ic, which employs continuous conduction mode as pfc control mode. various kinds of functions such as constant power limit, overvoltage detec tion, overcurrent detection, soft start function, feedback-loop open detection, and the function holding its operation through momentary outage (pfc hold function) are incorporated in a single chip. these functions reduce external circuitry. the constant power limit function significantly reduces "coil vibration", which is caused by the operation of a conventional overcurrent detection circuit when the system is overloaded. the pfc hold function enables quick recovery by keeping pfc operation active for a certain duration (hold time) during momentary outage/power failure. the hold tim e can be adjusted by an external capacitor. this ic provides the separated pin used for detecting overcurrent, so that, the preset current value range for overcurrent detection becomes wider than before. the shutdown function with latch mode is also implemented. a soft-start control pin is provided for th e easy adjustment of soft-start operation. and also the dynamic over voltage protection function integrated in this ic reduces overshooting of the output voltage, which might occur for the duration of startup, recovery after momentary power failure and just after a sudden variation of a load. features ? maximum ratings ? power-supply voltage vcc: 24 v ? operating junction temperature tjopr: ? 40 to 150c ? electrical characteristics ? vref output voltage vref: 5.0 v 1.6% ? uvlo operation start voltage vh: 10.4 0.7 v ? uvlo operation stop voltage vl: 8.9 0.5 v ? pfc output maximum on duty dmax-out: 95% (typ.) ? functions ? constant power limit function ? continuous conduction mode ? hold function of pfc operation on momentary outage (pfc hold function) ? overvoltage detection ? overcurrent detection ? soft start ? feedback loop disconnection detection ? ic shutdown function ? dynamic ovp (over voltage protection) ? package lineup: sop-16 applications ? flat panel display ? projector ? desktop pc ? white goods ordering information part no. package name package code taping spec. r2a20115spw0 fp-16dav prsp0016dh-b 2000 pcs./one taping product
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 2 of 7 system diagram from out 150 h to q1 gate rec+ rec? b+ q1 915k 0.0165 (5w) 680k 2.2k 470p b+ out gnd (385v dc) 470 f 2 (450v) to fb from vrb1(b+ monitor1) vrb1 6800p 1 0.1 720k 24v 680k 4.7 t1 0.47 1.5k 22k from auxiliary vref vref vref 14k 2m 0.22 68k 390p 1000p gate driver +/? 1.0a (peak) 5v internal bias circuit ground vcc iac cai cao gnd eo cgnd climit out 27.5v 5v vref generator fb 0.1 vref uvl rt 28 a ss ct v amp pfc-on delay vref good in out c limit c amp 2.48v 0.52v vref 0.81v 0.79v vref delay ss uvlo h l 10.4v 8.9v 3.6v 0.65v vref 2.4k 0.33 110k 2.4k 100 100p 51k 1 0.1 47k 6 1 3 15 2 16 9 10 7 12 5 4 8 14 13 11 logic multiplier ovp block fb eo discharge out disable ac-det shut down
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 3 of 7 pin arrangement (top view) 1 2 3 4 5 6 7 8 vcc ss eo fb iac pfc-on ct rt 16 15 14 13 12 11 10 9 out gnd delay cgnd cai vref cao climit pin description pin no. pin name i/o function 1 out output power mos fet gate driver output 2 gnd ? ground 3 delay input/output hold ti me adjust and ic shutdown 4 cgnd input non-inverting i nput of current amplifier 5 cai input/output inverting i nput of current ampl ifier and current out put for pfc control 6 vref output reference voltage output 7 cao output current amplifier output 8 climit input overcurrent detection 9 rt input/output timing resistor for settings of operational frequency, and the maximum cai pin and delay pin current 10 ct output timing capacitor for operational frequency adjust 11 pfc-on input detection of input ac voltage level 12 iac input detection of input ac waveform 13 fb input voltage amplifier input 14 eo output voltag e amplifier output 15 ss output timing capacitor for soft-start time adjust 16 vcc input power supply voltage input
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 4 of 7 absolute maximum ratings (ta = 25c) item symbol ratings unit note supply voltage vcc 24 v out peak current ipk-out 1.0 a 3 out dc current idc-out 0.1 a vi-group1 ?0.3 to vcc v 4 terminal voltage vi-group2 ?0.3 to vref v 5 cao voltage vcao ?0.3 to vcaoh v eo voltage veo ?0.3 to veoh v delay voltage vdelay ?0.3 to +6.5 v cai voltage vi-cs ?1.5 to +0.3 v rt current irt ?200 a iac current iiac 0.6 ma vref current io-ref ?5 ma power dissipation pt 1 w 6 operating junction temper ature tj-opr ?40 to +150 c storage temperature tstg ?55 to +150 c notes: 1. rated voltages are wi th reference to the gnd pin. 2. for rated currents, inflow to the ic is indicated by (+), and outflow by (?). 3. the transient current when driving capacitive load. 4. this is the rated voltage for the following pin: out. 5. this is the rated voltage for the following pins: cgnd, vref, climit, rt, ct, pfc-on, iac, fb, ss 6. thermal resistance of packages package ja jc note 120 c/w ? 40 40 1.6 [mm], mounted on a glass epoxy printed board with 10% wiring density sop16 ? 35 c/w infinite heat sink
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 5 of 7 electrical characteristics (ta = 25 c, vcc = 12 v, rt = 27 k , ct = 1000 pf) item symbol min typ max unit test conditions start threshold vh 9.7 10.4 11.1 v shutdown threshold vl 8.4 8.9 9.4 v uvlo hysteresis dv uvl 1.0 1.5 2.0 v startup current is 75 100 145 a vcc = 9.5 v is temperature stability dis/dta ? ?0.3 ? %/c * 1 supply operating current i cc 2.4 3.4 4.4 ma iac = 0 a, cl = 0 f output voltage vref 4.92 5.00 5.08 v isource = 1 ma line regulation vref-line ? 5 20 mv isource = 1 ma, vcc = 12 v to 23 v load regulation vref-load ? 5 20 mv isource = 1 ma to 5 ma vref temperature stability dvref ? 80 ? ppm/c ta = ?40 to 125c * 1 initial accuracy fout 55.0 61. 0 67.0 khz measured pin: out fout temperature stability dfout/dta ? 0.1 ? %/c ta = ?40 to 125c * 1 fout voltage stability f out-line ?1.5 0.5 1.5 % vcc = 12 v to 18 v ct peak voltage vct-h ? 3.6 4.0 v * 1 ramp valley voltage vct-l ? 0.65 ? v * 1 oscillator rt voltage vrt 1.18 1.22 1.26 v soft start sink current iss 17.0 28.0 39.0 a ss = 2 v threshold voltage vcl ?15 0 15 mv current limit delay to output td-cl ? 200 300 ns climit = 1 to ?0.3 v feedback voltage vfb 2.44 2.48 2.52 v fb-eo short input bias current ifb ?0.3 ?0.15 0 a measured pin: fb open loop gain av-v ? 53 ? db * 1 high voltage veoh 4.75 4.9 5. 05 v fb = 2.3 v, eo: open low voltage veol ? 0.1 0.3 v fb = 2.7 v, eo: open source current isrc-eo ?180 ?120 ?80 a fb = 1.0 v, eo = 2.5 v * 1 sink current isnk-eo ? 350 ? a fb = 4.0 v, eo = 2.5 v * 1 v amp transconductance gm-v 120 180 240 a/v fb = 2.5 v, eo = 2.5 v input offset voltage vio-ca ?10 ? 0 mv * 1 open loop gain av-ca ? 55 ? db * 1 high voltage vcaoh 4 4.5 5 v low voltage vcaol ? 0.1 0.3 v source current isrc-ca ?150 ?105 ?67 a cao = 2.5 v sink current isnk-ca 67 105 150 a cao = 2.5 v c amp transconductance gm-c 420 660 890 a/v * 1 note: 1. design spec.
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 6 of 7 electrical characteristics (cont.) (ta = 25 c, vcc = 12 v, rt = 27 k , ct = 1000 pf) item symbol min typ max unit test conditions iac pin voltage viac 0.4 1.4 2.0 v iac = 100 a imo current 1 imo1 ?57 ?47 ?37 a eo = 2.5 v, iac = 150 a pfc-on = 1.2 v imo current 2 imo2 ?158 ?125 ?91.5 a eo = vcaoh, iac = 150 a pfc-on = 1.2 v imo current 3 imo3 ?35.5 ?30 ?24.5 a eo = 2.5 v, iac = 375 a pfc-on = 2.5 v iac/ multiplier imo current 4 imo4 ?98.5 ?80 ?61.5 a eo = vcaoh, iac = 375 a pfc-on = 2.5 v minimum duty cycle dmin-out ? ? 0 % cao = 4.0 v maximum duty cycle dmax-out 90 95 98 % cao = 0 v rise time tr-out ? 30 100 ns cl = 1000 pf fall time tf-out ? 30 100 ns cl = 1000 pf vol1-out ? 0.08 0.2 v iout = 20 ma vol2-out ? 0.5 2.0 v iout = 200 ma (pulse test) low voltage vol3-out ? 0.07 0.7 v iout = 10 ma, vcc = 5 v voh1-out 11.5 11.9 ? v iout = ?20 ma out high voltage voh2-out 10.0 11.0 ? v iout = ?200 ma (pulse test) shut down voltage vshut 3. 30 4.00 4.70 v input: delay reset voltage vres ? ? 4.0 v input: vcc shut down shut down current ishut 45 95 190 a vcc = 9 v pfc enable voltage von-pfc 0.73 0. 81 0.89 v input pin: pfc-on pfc disable voltage voff-pfc 0.71 0.79 0.86 v input pin: pfc-on pfc disable delay threshold voltage vd-pfc 1.10 1.20 1.30 v input pin: delay input current ip fc-on ?1.0 ?0.2 1 a pfc-on = 2 v b+ ovp set voltage dvovps 0.125 0.188 0.250 v input pin: fb * 2 b+ ovp reset voltage dvovpr 0.010 0.050 0.100 v input pin: fb * 2 dynamic ovp set/reset voltage dvdovp 0.045 0.065 0.085 v input pin: fb * 2 fb low set voltage vfbls 0.47 0.52 0.57 v input pin: fb delay source current isrc-delay ?50.5 ?45.5 ?40.5 a delay = 1 v rt = 27 k supervisor delay sink current isnk-delay ? 815 ? a delay = 1 v rt = 27 k * 1 notes: 1. design spec. 2. dvovps = vovps ? vref 0.5 dvovpr = vovpr ? vref 0.5 dvdovp = vdovp ? vref 0.5 vovps vovpr fb out vfbls vdovp eo current 0 a isrc-eo isnk-eo vref 0.5
r2a20115sp rej03d0923-0100 rev.1.00 oct 06, 2009 page 7 of 7 package dimensions 0.80 0.15 1.27 7.50 8.00 0.40 0.34 a 1 10.5 max nom min dimension in millimeters symbol reference 2.20 0.90 0.70 0.50 5.50 0.20 0.10 0.00 0.46 0.25 0.20 0.15 7.80 8 0 0.12 1.15 10.06 l 1 z h e y x c b p a 2 e d b 1 c 1 e l a *1 *2 e 8 1 16 9 xm p *3 y f index mark b d e h z a terminal cross section ( ni/pd/au plating ) p c b 1 1 detail f l l a note) 1. dimensions"*1 (nom)"and"*2" do not include mold flash. 2. dimension"*3"does not include trim offset. e p-sop16-5.5x10.06-1.27 0.24g mass[typ.] fp-16dav prsp0016dh-b renesas code jeita package code previous code
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